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91.

Linux running inside a PDF file via a RISC-V emulator (github.com/ading2210)

183 points

a year ago

92.

Ariane RISC-V CPU (github.com/pulp-platform)

171 points

8 years ago

93.

Show HN: Minimax – A Compressed-First, Microcoded RISC-V CPU (github.com/gsmecher)

171 points

4 years ago

94.

Fast RISC-V-based scripting back end for game engines (github.com/fwsGonzo)

159 points

2 years ago

95.

A Verilog to Factorio Compiler and Simulator (Working RISC-V CPU) (github.com/ben-j-c)

154 points

2 months ago

96.

Western Digital SweRV RISC-V Core (github.com/chipsalliance)

153 points

6 years ago

97.

Ripes: Visual computer architecture simulator, assembly code editor for RISC-V (github.com/mortbopet)

151 points

3 years ago

98.

LuaJIT PR: Add Support for RISC-V 64 (github.com/LuaJIT)

146 points

2 years ago

99.

RVVM – The RISC-V Virtual Machine (github.com/LekKit)

140 points

3 years ago

100.

RVVM – RISC-V Virtual Machine (github.com/lekkit)

129 points

5 years ago

101.

A FPGA friendly 32 bit RISC-V CPU implementation (github.com/SpinalHDL)

121 points

a year ago

102.

IceStick Tutorial: experience FPGA design and RISC-V using $40 FPGA device (github.com/BrunoLevy)

119 points

5 years ago

103.

T1: A RISC-V Vector processor implementation (github.com/chipsalliance)

117 points

a year ago

104.

Show HN: Anos – a hand-written ~100KiB microkernel for x86-64 and RISC-V (github.com/roscopeco)

115 points

2 months ago

105.

Jupiter: RISC-V Assembler and Runtime Simulator (github.com/andrescv)

112 points

7 years ago

106.

NanoKVM: Affordable, Multifunctional, Nano RISC-V IP-KVM (github.com/sipeed)

111 points

2 years ago

107.

Show HN: IDE for Learning RISC-V (github.com/TheThirdOne)

105 points

7 years ago

108.

An FPGA-friendly 32-bit RISC-V CPU implementation (github.com/SpinalHDL)

102 points

9 years ago

109.

VeriGPU: GPU in Verilog loosely based on RISC-V ISA (github.com/hughperkins)

101 points

4 years ago

110.

Open-source soft-core RISC-V SoC with gdb support (github.com/stnolting)

94 points

5 years ago

111.

A minimal operating system (2K LOC) on QEMU and a RISC-V board (github.com/yhzhang0128)

87 points

3 years ago

112.

SiFive open sources RISC-V chips (github.com/sifive)

85 points

10 years ago

113.

Glacial – Microcoded RISC-V core designed for low FPGA resource utilization (github.com/brouhaha)

78 points

peter_d_sherman

5 years ago

114.

ORCA – An implementation of RISC-V intended to target FPGAs (github.com/VectorBlox)

77 points

10 years ago

115.

The Ice-V: a simple, compact RISC-V RV32I implementation in Silice (github.com/sylefeb)

75 points

5 years ago

116.

Show HN: New RISC-V emulator for Computer Science education (github.com/gboncoffee)

71 points

2 years ago

117.

Multiplix, operating system kernel for RISC-V and AArch64 SBCs (github.com/zyedidia)

70 points

3 years ago

118.

Emuko: Fast RISC-V emulator written in Rust, boots Linux (github.com/wkoszek)

70 points

3 months ago

119.

Mojo-V: Secret Computation for RISC-V (github.com/toddmaustin)

66 points

7 months ago

120.

Show HN: A pipelined RISC-V processor written in VHDL (github.com/inforichland)

65 points

11 years ago