Heykuki News

TopNewBestAskShowJobs
TopNewBestAskShowJobs
1.
Open-source soft-core RISC-V SoC with gdb support (github.com/stnolting)
94 points
_quarks_
5 years ago
18 comments
2.
A generic VHDL touch controller – add capacitive buttons to any FPGA (github.com/stnolting)
77 points
_quarks_
5 years ago
17 comments
3.
Adding custom RISC-V instructions to an open-source rv32 SoC (github.com/stnolting)
54 points
just_like_you
4 years ago
7 comments
4.
The NEO430 Processor (github.com/stnolting)
42 points
kqr2
5 years ago
7 comments
5.
NEORV32: A tiny, embedded and free-of-charge open-source RISC-V SoC (github.com/stnolting)
40 points
we_might_fall
4 years ago
6 comments
6.
Show HN: A tiny and platform-agnostic true random number generator for FPGA/ASIC (github.com/stnolting)
27 points
the_v01d
3 years ago
3 comments
7.
A Transparent Wishbone-to-SPI Bridge Supporting Execute-in-Place (XIP) (github.com/stnolting)
17 points
_quarks_
5 years ago
4 comments
8.
Show HN: A Tiny and Platform-Agnostic True Random Number Generator for Any FPGA (github.com/stnolting)
5 points
_quarks_
5 years ago
1 comment
9.
Show HN: Porting RISCOF to a new RISC-V target (github.com/stnolting)
2 points
youre_the_voice
4 years ago
discuss
10.
Show HN: Convert VHDL to Verilog using GHDL (+ first evaluation) (github.com/stnolting)
2 points
youre_the_voice
4 years ago
discuss
11.
Adding newlib system calls to a bare-metal RISC-V platform (github.com/stnolting)
2 points
just_like_you
4 years ago
discuss
12.
Open-source RISC-V soft-core NEORV32 adds on-chip debugger support (github.com/stnolting)
2 points
_quarks_
5 years ago
discuss
13.
Show HN: A Technolgy-Agnostic Physical Unclonable Function (PUF) for Any FPGA (github.com/stnolting)
1 point
_quarks_
5 years ago
1 comment
14.
The NEORV32 RISC-V soft-core microcontroller (github.com/stnolting)
1 point
_quarks_
5 years ago
1 comment
15.
Fire Code font version 4 released (github.com/tonsky)
2 points
sthottingal
6 years ago
discuss