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1.

Show HN: RISCY-V02: A 16-bit 2-cycle RISC-V-ish CPU in the 6502 footprint (github.com/mysterymath)

7 points

3 months ago

2.

Command-Line Lint (github.com/riscy)

2 points

7 years ago

3.

Show HN: Risky, a Chrome extension for 'risky clicks' (chrome.google.com)

5 points

11 years ago

4.

The Improved RISC-V Specification (latest WIP draft)

5 points

2 years ago

5.

Show HN:Interactive RISC-V CPU Visualizer (Sequential and Pipelined) (mostlykiguess.github.io)

4 points

7 months ago

6.

Show HN: Miralis – a RISC-V virtual firmware monitor (github.com/CharlyCst)

4 points

a year ago

7.

GNU toolchain for RISC-V including GCC (github.com/riscv-collab)

178 points

3 years ago

8.

RISC-V J extension – Instructions for JITs (github.com/riscv)

137 points

4 years ago

9.

F# RISC-V Instruction Set formal specification (github.com/mrLSD)

134 points

3 years ago

10.

Show HN: v8-riscv — Port of JavaScript V8 engine to RISC-V (github.com/v8-riscv)

123 points

5 years ago

11.

F# RISC-V Instruction Set Formal Specification (github.com/mrLSD)

122 points

7 years ago

12.

RISC-V formal spec public review (github.com/riscv)

116 points

7 years ago

13.

RISC-V Software Ecosystem Overview (github.com/riscv)

83 points

6 years ago

14.

RISC-V Scalar Cryptography Extension reaches public review (github.com/riscv)

78 points

5 years ago

15.

Zero knowledge proofs in RISC-V (github.com/risc0)

39 points

4 years ago

16.

Show HN: RISC-V disassembler in 200 lines of C (github.com/andportnoy)

29 points

6 years ago

17.

Zirgen: Compiler for a Domain-Specific Language (github.com/risc0)

21 points

5 months ago

18.

RISC-V Server Platform Spec Ratified (github.com/riscv-non-isa)

17 points

a month ago

19.

RISC Zero (github.com/risc0)

16 points

2 years ago

20.

Show HN: #AlphanumericShellcoding, alphanumeric shellcodes on RISC-V [DEFCON'27] (github.com/RischardV)

7 points

7 years ago

21.

Show HN: A straightforward RISC-V 32-bit emulator (github.com/jawline)

5 points

2 years ago

22.

RISC-V(RV32IM) emulator written in C (github.com/mirimmad)

5 points

3 years ago

23.

RISC-V Integrated Matrix Extension Release for Internal Review (github.com/riscv)

5 points

3 months ago

24.

RISC-V J extension: makes RISC-V a target for JIT/interpreted languages (github.com/riscv)

5 points

2 years ago

25.

RISC-V Vector Extension 1.0, frozen for public review (github.com/riscv)

5 points

5 years ago

26.

RISC-V Open Source Supervisor Binary Interface (github.com/riscv)

5 points

5 years ago

27.

F# RISC-V v0.6.0 released (github.com/mrLSD)

4 points

2 days ago

28.

A RISC-V assembler in Tcl (github.com/jbroll)

4 points

5 years ago

29.

Core RISC OS free fonts (github.com/marutan)

3 points

5 years ago

30.

RISC-V RVA23 and RVB23 v0.6 profiles released for Public Review (github.com/riscv)

3 points

2 years ago