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1.
▲
PCIe Endpoint on Xilinx 7-Series FPGAs with PCIe_2_1 Hard Block and GTP
(github.com/regymm)
34 points
transpute
a year ago
discuss
2.
▲
No-MMU Linux Capable RISC-V SoC
(github.com/regymm)
2 points
picture
4 years ago
discuss