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241.

Futurelock: A subtle risk in async Rust (rfd.shared.oxide.computer)

449 points

7 months ago

242.

Risk Assessment of GitHub Copilot (gist.github.com)

363 points

5 years ago

243.

An ex-ARM engineer critiques RISC-V (gist.github.com)

350 points

6 years ago

244.

Verilog sources for Western Digital's open source RISC-V core (github.com/westerndigitalcorporation)

320 points

7 years ago

245.

Computerraria: A fully compliant RISC-V computer inside Terraria (github.com/misprit7)

289 points

3 years ago

246.

Open source RISC-V implemented from scratch in one night (github.com/darklife)

272 points

8 years ago

247.

XiangShan – Open-source high performance RISC-V processor (github.com/OpenXiangShan)

270 points

a year ago

248.

Open-source high-performance RISC-V processor (github.com/OpenXiangShan)

262 points

3 years ago

249.

Lion: A formally verified, 5-stage pipeline RISC-V core (github.com/standardsemiconductor)

241 points

5 years ago

250.

Writing an OS in Rust to run on RISC-V (gist.github.com)

229 points

3 years ago

251.

Ariane RISC-V CPU – An open source CPU capable of booting Linux (github.com/openhwgroup)

210 points

6 years ago

252.

Open source RISC-V GPGPU (github.com/vortexgpgpu)

207 points

5 years ago

253.

A tiny C header-only RISC-V emulator (github.com/cnlohr)

205 points

4 years ago

254.

Octox: Unix-like OS in Rust inspired by xv6-riscv (github.com/o8vm)

190 points

3 years ago

255.

Show HN: RISC-V core written in 600 lines of C89 (github.com/mnurzia)

190 points

3 years ago

256.

Linux running inside a PDF file via a RISC-V emulator (github.com/ading2210)

183 points

a year ago

257.

Ariane RISC-V CPU (github.com/pulp-platform)

171 points

8 years ago

258.

Show HN: Minimax – A Compressed-First, Microcoded RISC-V CPU (github.com/gsmecher)

171 points

4 years ago

259.

Asset-Level Transition Risk in the Global Coal, Oil, and Gas Supply Chains (github.com/Lkruitwagen)

164 points

4 years ago

260.

Fast RISC-V-based scripting back end for game engines (github.com/fwsGonzo)

159 points

2 years ago

261.

A Verilog to Factorio Compiler and Simulator (Working RISC-V CPU) (github.com/ben-j-c)

154 points

2 months ago

262.

Western Digital SweRV RISC-V Core (github.com/chipsalliance)

153 points

6 years ago

263.

Ripes: Visual computer architecture simulator, assembly code editor for RISC-V (github.com/mortbopet)

151 points

3 years ago

264.

LuaJIT PR: Add Support for RISC-V 64 (github.com/LuaJIT)

146 points

2 years ago

265.

Shellfirm: Intercept risky patterns at the command line (github.com/kaplanelad)

145 points

4 years ago

266.

RVVM – The RISC-V Virtual Machine (github.com/LekKit)

140 points

3 years ago

267.

Bitcoin arbitrage without market risk (github.com/butor)

138 points

9 years ago

268.

RVVM – RISC-V Virtual Machine (github.com/lekkit)

129 points

5 years ago

269.

Show HN: CLI that spots fake GitHub stars, risky dependencies and licence traps (github.com/m-ahmed-elbeskeri)

122 points

a year ago

270.

A FPGA friendly 32 bit RISC-V CPU implementation (github.com/SpinalHDL)

121 points

a year ago