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151.

How to run Ockam on RISC-V Linux (github.com/ockam-network)

14 points

5 years ago

152.

Salus: A micro hypervisor for RISC-V systems (github.com/rivosinc)

13 points

3 years ago

153.

LuaJIT maintainers quietly deleted discussion about RISC-V 64 support

12 points

4 months ago

154.

SERV: A bit-serial RISC-V core (github.com/olofk)

9 points

3 years ago

155.

Ask HN: Porting MIT CADR to RISC-V

8 points

3 months ago

156.

Smol-GPU: A tiny RISC-V GPU built to teach modern GPU architecture (github.com/Grubre)

8 points

a year ago

157.

How to get started with Rust for RISC-V targets (github.com/ockam-network)

8 points

5 years ago

158.

Linux on RISC-V on Arduino Uno (github.com/raspiduino)

7 points

3 years ago

159.

Kilo editor ported to Forth for RISC-V (github.com/mcmenaminadrian)

7 points

a year ago

160.

Apple is adding Mach-O's riscv32 support to LLVM (github.com/llvm)

7 points

a year ago

161.

D Apps for Apache NuttX RTOS and QEMU RISC-V (github.com/kassane)

7 points

2 years ago

162.

Muntjac: An open source, Linux capable, 64 bit RISCV core (github.com/lowRISC)

7 points

4 years ago

163.

Show HN: Bronzebeard – Minimal assembler for bare-metal RISC-V development (github.com/theandrew168)

7 points

5 years ago

164.

JuiceVM: Smallest RISC-V Virtual Machine that can run Linux mainline kernel (github.com/juiceRv)

7 points

5 years ago

165.

BinSym: Symbolic execution for RISC-V machine code based on LibRISCV ISA model (github.com/agra-uni-bremen)

6 points

2 years ago

166.

CVA6 – an Application class 6-stage RISC-V CPU capable of booting Linux (github.com/openhwgroup)

6 points

3 years ago

167.

FreeBSD Adapted for Cheri-MIPS, Cheri-RISC-V, and Arm Morello (github.com/CTSRD-CHERI)

6 points

5 years ago

168.

Flute: RISC-V CPU, simple 5-stage in-order pipeline (github.com/bluespec)

6 points

7 years ago

169.

RISC-V Vector Extension for Integer Workloads: An Informal Gap Analysis (gist.github.com)

5 points

2 years ago

170.

Show HN: RISC-V Linux Terminal emulated via WASM (cartesi-machine.surge.sh)

5 points

3 years ago

171.

Show HN: Brainfuck to RISC-V JIT compiler written in Zig (github.com/evelance)

5 points

a year ago

172.

XiangShan (香山) is an open-source high-performance RISC-V processor project (github.com/OpenXiangShan)

5 points

4 years ago

173.

We Built UltrafastSecp256k1 Up to 51% Faster ECC Across x86,ARM64,and RISC-V

5 points

3 months ago

174.

MODPlayRISCV – Playing tracker Music on ultra-low-end RISC-V MCUs (github.com/cpldcpu)

5 points

7 months ago

175.

RVVM: RISC-V Virtual Machine (github.com/LekKit)

5 points

a year ago

176.

Release RP2350 and ESP32-C6 support, RISC-V native emitter, common TinyUSB code (github.com/micropython)

5 points

2 years ago

177.

Ettore: RISC-V virtual machine, written in Go (github.com/teivah)

5 points

2 years ago

178.

SERV – The SErial RISC-V CPU (github.com/olofk)

5 points

2 years ago

179.

A minimal operating system (2K LOC) on QEMU and a RISC-V board (github.com/yhzhang0128)

5 points

3 years ago

180.

core-v-wally: Configurable RISC-V Processor (github.com/openhwgroup)

5 points

3 years ago