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121.
▲
Click-V: A RISC-V emulator built with ClickHouse SQL
(github.com/SpencerTorres)
64 points
calcifer
a year ago
9 comments
122.
▲
Adding custom RISC-V instructions to an open-source rv32 SoC
(github.com/stnolting)
54 points
just_like_you
4 years ago
7 comments
123.
▲
PicoRV32 – A Size-Optimized RISC-V CPU
(github.com/cliffordwolf)
53 points
jsnell
11 years ago
21 comments
124.
▲
Geohot/twitchcore: A RISC-V core, first in Python, then in Verilog, then on FPGA
(github.com/geohot)
51 points
lsllc
5 years ago
3 comments
125.
▲
Show HN: I built a RISC-V emulator that runs DOOM
(github.com/lalitshankarch)
50 points
Flex247A
a month ago
4 comments
126.
▲
Some Criticisms of RISC-V
(gist.github.com)
41 points
DyslexicAtheist
7 years ago
16 comments
127.
▲
Show HN: Libriscv – RISC-V userspace emulator library
(github.com/fwsGonzo)
40 points
fwsgonzo
4 years ago
8 comments
128.
▲
NEORV32: A tiny, embedded and free-of-charge open-source RISC-V SoC
(github.com/stnolting)
40 points
we_might_fall
4 years ago
6 comments
129.
▲
Zero knowledge proofs in RISC-V
(github.com/risc0)
39 points
miohtama
4 years ago
6 comments
130.
▲
Riscrithm – An intuitive RISC-V assembler and optimizer coded in Go
(github.com/ghetea-patrick)
32 points
patrick-ghetea
10 days ago
11 comments
131.
▲
Show HN: C++17 RISC-V RV32GC / RV64GC userspace emulator library
(github.com/fwsGonzo)
31 points
fwsgonzo
6 years ago
5 comments
132.
▲
128-bit RISC-V assembler
(github.com/fwsGonzo)
30 points
ingve
5 years ago
21 comments
133.
▲
RISC-V Sandboxing Library
(github.com/libriscv)
25 points
fwsgonzo
a year ago
discuss
134.
▲
Run Linux in VRChat by emulating RISC-V in a GPU shader program
(github.com/PiMaker)
18 points
exikyut
5 years ago
1 comment
135.
▲
Felix86: Play x86-64 games on RISC-V
(github.com/OFFTKP)
15 points
marble_actual
a year ago
1 comment
136.
▲
Possible GPL Violation by Banana Pi RiscV
(github.com/BPI-SINOVOIP)
14 points
gdgghhhhh
10 months ago
2 comments
137.
▲
How to run Ockam on RISC-V Linux
(github.com/ockam-network)
14 points
mattgreg
5 years ago
discuss
138.
▲
Salus: A micro hypervisor for RISC-V systems
(github.com/rivosinc)
13 points
ignoramous
3 years ago
1 comment
139.
▲
LuaJIT maintainers quietly deleted discussion about RISC-V 64 support
12 points
SpriteOvO
4 months ago
1 comment
140.
▲
SERV: A bit-serial RISC-V core
(github.com/olofk)
9 points
adwn
3 years ago
discuss
141.
▲
Ask HN: Porting MIT CADR to RISC-V
8 points
lstevens14
3 months ago
discuss
142.
▲
Smol-GPU: A tiny RISC-V GPU built to teach modern GPU architecture
(github.com/Grubre)
8 points
thunderbong
a year ago
discuss
143.
▲
How to get started with Rust for RISC-V targets
(github.com/ockam-network)
8 points
__mrinal__
5 years ago
discuss
144.
▲
Linux on RISC-V on Arduino Uno
(github.com/raspiduino)
7 points
jamesy0ung
3 years ago
6 comments
145.
▲
Show HN: RISCY-V02: A 16-bit 2-cycle RISC-V-ish CPU in the 6502 footprint
(github.com/mysterymath)
7 points
mysterymath
3 months ago
4 comments
146.
▲
Kilo editor ported to Forth for RISC-V
(github.com/mcmenaminadrian)
7 points
00_NOP
a year ago
4 comments
147.
▲
Apple is adding Mach-O's riscv32 support to LLVM
(github.com/llvm)
7 points
MaskRay
a year ago
1 comment
148.
▲
D Apps for Apache NuttX RTOS and QEMU RISC-V
(github.com/kassane)
7 points
lupyuen
2 years ago
discuss
149.
▲
Muntjac: An open source, Linux capable, 64 bit RISCV core
(github.com/lowRISC)
7 points
gchadwick
4 years ago
discuss
150.
▲
Show HN: Bronzebeard – Minimal assembler for bare-metal RISC-V development
(github.com/theandrew168)
7 points
theandrew168
5 years ago
discuss
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