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61.
▲
Show HN: Confidential computing for high-assurance RISC-V embedded systems
(github.com/IBM)
103 points
mrnoone
a year ago
9 comments
62.
▲
Porting OpenBSD to RISC-V Final Report (2020) [pdf]
(github.com/MengshiLi)
93 points
todsacerdoti
5 years ago
4 comments
63.
▲
RISC-V Vector Primer
(github.com/simplex-micro)
69 points
oxxoxoxooo
4 months ago
22 comments
64.
▲
Jonesforth Port to RISC-V
(github.com/jjyr)
66 points
rwmj
5 years ago
8 comments
65.
▲
Riscrithm – An intuitive RISC-V assembler and optimizer coded in Go
(github.com/ghetea-patrick)
32 points
patrick-ghetea
10 days ago
13 comments
66.
▲
RiscVivid – An educational RISC-V simulator
(github.com/unia-sik)
14 points
nanope
4 years ago
discuss
67.
▲
Show HN: Emacs-riscv – A RISC-V emulator written in Emacs Lisp
(github.com/gongo)
10 points
gongo
5 months ago
discuss
68.
▲
Marss-Riscv: Micro-ARchitectural Full System Simulator for RISC-V
(github.com/bucaps)
8 points
GeorgeTirebiter
7 years ago
1 comment
69.
▲
Riscrithm (v1.1) – An intuitive RISC-V assembler and optimizer written in Go
(github.com/ghetea-patrick)
4 points
patrick-ghetea
2 days ago
2 comments
70.
▲
RISC-V Vector Primer
(github.com/simplex-micro)
4 points
mshockwave
4 months ago
discuss
71.
▲
Calyx-riscv: RISCV Core written in Calyx
(github.com/sgpthomas)
4 points
luu
2 years ago
discuss
72.
▲
A concise example for learning assembly, linking and relocation
(github.com/peiyuanix)
4 points
peiyuanix
3 years ago
discuss
73.
▲
A minimal RISC-V bare metal program to print “Hello, RISC-V”
(github.com/peiyuanix)
4 points
peiyuanix
3 years ago
discuss
74.
▲
Jonesforth Port to RISC-V
(github.com/jjyr)
2 points
rwmj
6 years ago
1 comment
75.
▲
Show HN: Porting RISCOF to a new RISC-V target
(github.com/stnolting)
2 points
youre_the_voice
4 years ago
discuss
76.
▲
Porting OpenBSD to RISC-V ISA
(github.com/MengshiLi)
2 points
gbrown_
5 years ago
discuss
77.
▲
Show HN: A small RISC-V Virtual Machine
(github.com/bit-hack)
2 points
bit-hack
6 years ago
discuss
78.
▲
Port of (JavaScript version of) corewars8086 to RISC-V
(github.com/westerndigitalcorporation)
2 points
harshreality
7 years ago
discuss
79.
▲
RISC-V CPU in Chisel
(github.com/ucb-bar)
1 point
electronous
13 years ago
discuss
80.
▲
Show HN: The C3 programming language (C alternative language)
(github.com/c3lang)
175 points
lerno
a year ago
185 comments
81.
▲
Ask HN: Examples of Microkernels?
80 points
agomez314
4 years ago
79 comments
82.
▲
Vibe Code Warning – A personal casestudy
(github.com/jackdoe)
400 points
jackdoe
7 months ago
313 comments
83.
▲
Xv6 for RISC-V
(github.com/mit-pdos)
114 points
ingve
7 years ago
8 comments
84.
▲
RISC-V userspace emulator library
(github.com/fwsGonzo)
43 points
ingve
7 years ago
4 comments
85.
▲
Xv6 for RISC-V
(github.com/mit-pdos)
5 points
tirrex
4 years ago
discuss
86.
▲
RISC-V userspace emulator library
(github.com/fwsGonzo)
3 points
ingve
7 years ago
discuss
87.
▲
How to make RISC-V Microcomputer using FPGA for programmer
(github.com/horie-t)
2 points
teleforce
4 years ago
1 comment
88.
▲
Show HN: TCP Socket in RISC-V Assembly (RV64I)
(github.com/triilman25)
4 points
triilman
a year ago
discuss
89.
▲
AOSP (Android 10) port to RISC-V
(github.com/T-head-Semi)
4 points
rwmj
5 years ago
discuss
90.
▲
Android 10 ported to RISC-V
(github.com/T-head-Semi)
2 points
varbhat
5 years ago
discuss
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