I built two Loihi-parity neuromorphic processors from scratch

1 point

4 months ago

Catalyst — two generations of neuromorphic processor, built solo, from RTL to SDK to cloud API.

  Catalyst N1 (first generation — Loihi 1 feature parity):
  - 128 cores, 1,024 CUBA LIF neurons each, 131K CSR synapses per core
  - Programmable microcode learning engine: 16 registers, 14 opcodes (STDP, three-factor eligibility, homeostatic normalization)
  - 8-bit graded spike payloads (actually a Loihi 2 feature — N1 exceeds Loihi 1 here)
  - 3 synapse formats (sparse, dense, population-coded), per-synapse delays up to 63 timesteps
  - Triple RV32IMF RISC-V embedded cluster with FPU
  - 24-bit state precision (vs Loihi 1's 23-bit)
  - 25 RTL testbenches, 98 scenarios, zero failures

  Catalyst N2 (second generation — Loihi 2 feature parity):
  Everything in N1, plus:
  - Programmable neuron microcode engine — each neuron runs a user-defined program, replacing the fixed CUBA datapath
  - 5 neuron models shipped: CUBA LIF, Izhikevich (4 presets), Adaptive LIF, Sigma-Delta, Resonate-and-Fire
  - 4 graded spike payload formats (0/8/16/24-bit vs Loihi 2's limited range)
  - Variable-precision weight packing: 1/2/4/8/16-bit (vs Loihi 2's 1-8 bit — we exceed here)
  - 5 spike traces (x1, x2, y1, y2, y3) enabling triplet STDP
  - Per-synapse-group plasticity enable (30-70% learning speedup)
  - Persistent reward traces with temporal credit assignment
  - Homeostatic threshold plasticity
  - Full observability: performance counters, 25-variable state probes, energy metering
  - Convolutional synapse encoding (4th format)
  - 28/28 FPGA integration tests on AWS F2 (VU47P), 163K+ spikes, zero mismatches
  - Hardware-accurate simulation defaults (24-bit fixed-point, strict SRAM limits)

  The SDK covers both processors: 3,091 tests, 155 features, CPU/GPU/FPGA backends. 85.9% on Spiking Heidelberg Digits (surrogate gradient trained, 16-bit quantized).

  The big architectural decision in N2 was making the neuron programmable. N1 had a hardcoded CUBA LIF datapath — functional but limiting. N2 replaces it with a fetch-execute microcode engine where each neuron runs its own program from instruction SRAM. Same philosophy
  as the shift from fixed-function GPU pixel pipelines to programmable shaders. You can now implement arbitrary neuron dynamics without changing hardware.

  Cloud API lets you try both processors without any hardware:

  - Cloud API: https://catalyst-neuromorphic.com/cloud
  - GitHub: https://github.com/Mr-wabbit/catalyst-neurocore
  - Full SDK source access: https://github.com/sponsors/Mr-wabbit (from $25/mo)
  - Licensed under BSL 1.1 (source-available, free for research)
  - Contact: [email protected]

  238 development phases, all by one person. Happy to answer questions about either processor.

Catalyst N1 (first generation — Loihi 1 feature parity): - 128 cores, 1,024 CUBA LIF neurons each, 131K CSR synapses per core - Programmable microcode learning engine: 16 registers, 14 opcodes (STDP, three-factor eligibility, homeostatic normalization) - 8-bit graded spike payloads (actually a Loihi 2 feature — N1 exceeds Loihi 1 here) - 3 synapse formats (sparse, dense, population-coded), per-synapse delays up to 63 timesteps - Triple RV32IMF RISC-V embedded cluster with FPU - 24-bit state precision (vs Loihi 1's 23-bit) - 25 RTL testbenches, 98 scenarios, zero failures Catalyst N2 (second generation — Loihi 2 feature parity): Everything in N1, plus: - Programmable neuron microcode engine — each neuron runs a user-defined program, replacing the fixed CUBA datapath - 5 neuron models shipped: CUBA LIF, Izhikevich (4 presets), Adaptive LIF, Sigma-Delta, Resonate-and-Fire - 4 graded spike payload formats (0/8/16/24-bit vs Loihi 2's limited range) - Variable-precision weight packing: 1/2/4/8/16-bit (vs Loihi 2's 1-8 bit — we exceed here) - 5 spike traces (x1, x2, y1, y2, y3) enabling triplet STDP - Per-synapse-group plasticity enable (30-70% learning speedup) - Persistent reward traces with temporal credit assignment - Homeostatic threshold plasticity - Full observability: performance counters, 25-variable state probes, energy metering - Convolutional synapse encoding (4th format) - 28/28 FPGA integration tests on AWS F2 (VU47P), 163K+ spikes, zero mismatches - Hardware-accurate simulation defaults (24-bit fixed-point, strict SRAM limits) The SDK covers both processors: 3,091 tests, 155 features, CPU/GPU/FPGA backends. 85.9% on Spiking Heidelberg Digits (surrogate gradient trained, 16-bit quantized). The big architectural decision in N2 was making the neuron programmable. N1 had a hardcoded CUBA LIF datapath — functional but limiting. N2 replaces it with a fetch-execute microcode engine where each neuron runs its own program from instruction SRAM. Same philosophy as the shift from fixed-function GPU pixel pipelines to programmable shaders. You can now implement arbitrary neuron dynamics without changing hardware. Cloud API lets you try both processors without any hardware: - Cloud API: https://catalyst-neuromorphic.com/cloud - GitHub: https://github.com/Mr-wabbit/catalyst-neurocore - Full SDK source access: https://github.com/sponsors/Mr-wabbit (from $25/mo) - Licensed under BSL 1.1 (source-available, free for research) - Contact: [email protected] 238 development phases, all by one person. Happy to answer questions about either processor.